anx_II__table__2

X.A.II.001 | Computers, “electronic assemblies” and related equipment, not controlled by 4A001 or 4A003 (1), and specially designed components therefor. Note: The control status of the “digital computers” and related equipment described in X.A.II.001 is determined by the control status of other equipment or systems provided: a. The “digital computers” or related equipment are essential for the operation of the other equipment or systems; b. The “digital computers” or related equipment are not a “principal element” of the other equipment or systems; and N.B.1: The control status of “signal processing” or “image enhancement” equipment specially designed for other equipment with functions limited to those required for the other equipment is determined by the control status of the other equipment even if it exceeds the “principal element” criterion. N.B.2: For the control status of “digital computers” or related equipment for telecommunications equipment, see Category 5, Part 1 (Telecommunications) (2). c. The “technology” for the “digital computers” and related equipment is determined by 4E (3). a. Electronic computers and related equipment, and “electronic assemblies” and specially designed components therefor, rated for operation at an ambient temperature above 343 K (70 oC); b. “Digital computers”, including equipment of “signal processing” or “image enhancement”, having an “Adjusted Peak Performance” (“APP”) equal to or greater than 0,0128 Weighted TeraFLOPS (WT); c. “Electronic assemblies” that are specially designed or modified to enhance performance by aggregation of processors, as follows: 1. Designed to be capable of aggregation in configurations of 16 or more processors; 2. Not used; Note 1: X.A.II.001.c applies only to “electronic assemblies” and programmable interconnections with a “APP” not exceeding the limits in X.A.II.001.b, when shipped as unintegrated “electronic assemblies”. It does not apply to “electronic assemblies” inherently limited by nature of their design for use as related equipment controlled by X.A.II.001.k. Note 2: X.A.II.001.c does not control any “electronic assembly” specially designed for a product or family of products whose maximum configuration does not exceed the limits of X.A.II.001.b. d. Not used; e. Not used; f. Equipment for “signal processing” or “image enhancement” having an “Adjusted Peak Performance” (“APP”) equal to or greater than 0,0128 Weighted TeraFLOPS WT; g. Not used; h. Not used; i. Equipment containing “terminal interface equipment” exceeding the limits in X.A.III.101; Technical Note: For the purpose of X.A.II.001.i, “terminal interface equipment” means equipment at which information enters or leaves the telecommunication system, e.g. telephone, data device, computer, etc. j. Equipment specially designed to provide external interconnection of “digital computers” or associated equipment that allows communications at data rates exceeding 80 Mbyte/s. Note: X.A.II.001.j does not control internal interconnection equipment (e.g., backplanes, buses) passive interconnection equipment, “network access controllers” or “communication channel controllers”. Technical Note: For the purpose of X.A.II.001.j, “communication channel controllers” is the physical interface which controls the flow of synchronous or asynchronous digital information. It is an assembly that can be integrated into computer or telecommunications equipment to provide communications access. k. Hybrid computers and “electronic assemblies” and specially designed components therefor containing analogue-to-digital converters having all of the following characteristics: 1. 32 channels or more; and 2. A resolution of 14 bit (plus sign bit) or more with a conversion rate of 200 000 Hz or more. X.D.II.001 | “Program” proof and validation “software”, “software” allowing the automatic generation of “source codes”, and operating system “software” that are specially designed for “real-time processing” equipment.” a. “Program” proof and validation “software” using mathematical and analytical techniques and designed or modified for “programs” having more than 500 000 “source code” instructions; b. “Software” allowing the automatic generation of “source codes” from data acquired on line from external sensors described in the Regulation (EU) 2021/821; or c. Operating system “software” specially designed for “real-time processing” equipment that guarantees a “global interrupt latency time” of less than 20 μs. Technical Note: For the purpose of X.D.II.001, “global interrupt latency time” is the time taken by the computer system to recognise an interrupt due to the event, service the interrupt and perform a context switch to an alternate memory-resident task waiting on the interrupt. X.D.II.002 | “Software” other than that controlled in 4D001 (4) specially designed or modified for the “development”, “production” or “use” of equipment controlled by 4A101 (5). X.E.II.001 | “Technology” for the “development”, “production” or “use” of equipment controlled by X.A.II.001, or “software” controlled by X.D.II.001 or X.D.II.002. X.E.II.002 | “Technology” for the “development” or “production” of equipment designed for “multi-data-stream processing”. Technical Note: For the purpose of X.E.II.002, “multi-data-stream processing” is a microprogram or equipment architecture technique that permits simultaneous processing of two or more data sequences under the control of one or more instruction sequences by means such as: 1. Single Instruction Multiple Data (SIMD) architectures such as vector or array processors; 2. Multiple Single Instruction Multiple Data (MSIMD) architectures; 3. Multiple Instruction Multiple Data (MIMD) architectures, including those that are tightly coupled, closely coupled or loosely coupled; or 4. Structured arrays of processing elements, including systolic arrays.

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Source: EUR-Lex (Cellar) · retrieved 2026-10-17 · Text as adopted (Official Journal); later amendments are not incorporated in this text.